In Direct Sequence Code Division Multiple Access (DS-CDMA) systems, a receiver may be assigned to receive multiple symbol sequences sent in parallel using different orthogonal codes. When a sequence of symbol blocks is received over a dispersive channel, however, orthogonality between codes is destroyed and intersymbol interference (ISI) results between time-successive symbol blocks and between the symbols within each symbol block. ISI may also be caused in other systems, such as those based on Multiple-Input Multiple-Output (MIMO) transmission where non-orthogonal symbol sequences are sent in parallel from different antennas. In all cases, some form of interference suppression or equalization is needed.
One approach to equalization employing maximum likelihood detection (MLD) would hypothesize all MN possible combinations of symbols in each symbol block and form metrics to determine the most likely symbol combination, where M is the number of possible values each symbol may take and N is the number of symbols in each symbol block. However, even for blocks of three 16-QAM symbols in the HSPA uplink, the 163=4096 possible symbol combinations for each symbol block renders such an approach impractical, as the state-size and number of metrics to compute would be prohibitively large.
Another approach referred to as Assisted Maximum Likelihood Detection (AMLD) with Multi-Stage Assistance (MSA) reduces computational complexity. See the parent application hereto, U.S. patent application Ser. No. 12/568,036. In one embodiment of AMLD with MSA, for example, two or more stages of detection assistance are performed in succession by jointly detecting progressively larger groups of symbols in a symbol block across the stages of detection assistance. As a result, the two or more stages of detection assistance identify a final reduced set of candidate symbol combinations that is reduced as compared to the defined set of all possible symbol combinations. A detector then detects a symbol block using a joint detection process that limits the candidate combinations of symbols considered for the symbol block to the final reduced set of candidate symbol combinations identified for that symbol block.
In limiting the candidate combinations of symbols that must be considered by the detector to the final reduced set identified for each symbol block, the stages of detection assistance greatly reduce the computational complexity of the detector. Moreover, the computational complexity of AMLD with MSA remains mostly stable over the detection of different symbol blocks, provided that the size of the final reduced sets identified for those symbol blocks doesn't significantly vary.
By only considering the final reduced set identified for a symbol block, however, the detector can produce insufficient reliability, or soft, information about the bits detected. In fact, some of the candidate symbol combinations needed by the detector to generate this soft information (e.g., the combinations corresponding to one or more bit values complementary to those detected) may be missing entirely from the final reduced set. Additional processing could be performed to determine the missing candidate symbol combinations and append as many of them to the final reduced set as needed for the detected bit values to have complementary bit values. See, e.g., U.S. patent application Ser. No. 12/510,537, filed Jul. 28, 2009, the entire disclosure of which is incorporated by reference. However, the additional processing required for such an approach would threaten to significantly increase the computational complexity of AMLD with MSA, and the variable size of the final reduced set would likely jeopardize the stability of that computational complexity.